600 課程
SoC Digital Design
Course Introduction
This project aims to create a SoC design by designing a DMA controller with an AHB bus IP (AHB-DMA) and integrating it with a third-party AHB backbone network. This project not only allows students to familiarize themselves with the AMBA bus protocol, widely used in current SoC designs, but also allows them to gain familiarity with the SoC integration process and develop industry-leading implementation skills. Finally, the popular UVM verification method will be used to further enhance debugging capabilities.
Course Objectives
Through the arrangement of this project, one can be skilled almost all core technologies of design, such as Decoder, multiplexer, FSM, Control/Data Path processing, pipeline, serial in parallel out, asynchronous design, FIFO, Bus (especially the most popular AMBA in the industry), memory modeling, large amount of data processing, handshake.
Target Audiences
One who targets to be a Digital designer.
SoC Design Verification
Course Introduction
In this project, one is requested to verify a “data receiver with AHB bus DMA controller” IP (AHB-DMA) SoC Design. Thru this project, one can be familiar with AMBA bus protocol which is widely used in nowadays SoC design.
Course Objectives
Through the arrangement of this project, one can be skilled almost all core technologies of verification: 1.APB is usually a topic used by industry companies to train UVM engineers, focusing on practicing the handshake mechanism. 2.AHB interface to practice monitor. 3.memory modeling practices SVA. 4.RX DMA practices proprietary interfaces and interactive verification between various interfaces.
Target Audiences
One who targets to be a Digital verification engineer.
AI-Driven Design Implementation
Course Introduction
AI is significantly enhancing efficiency and reducing development costs in chip design, while also driving innovation in complex chips such as AI accelerators, high-performance CPUs, and GPUs. This project focuses on applications and technological breakthroughs in areas such as placement and routing, as well as performance and power optimization. The goal is to rapidly identify optimal solutions within a vast parameter space that includes area, power, and performance.
Course Objectives
Acquire the knowledge and application of AI on IC design from RTL to GDS. Understand the fundamental and important DSO.ai capabilities for improving design performance, power, and area with limited engineering resources.
Target Audiences
One who are expected to have basic understanding of IC design flow and EDA tool exposure and are looking for learning AI application on IC design with hands-on experience.
FinFET Physical Implementation
Course Introduction
FinFET technology is rapidly transforming traditional chip design processes. This project specifically targets optimization of fin structures and leakage current. The design flow includes placement, routing, timing, and power analysis.
Course Objectives
Acquire the knowledge for the advanced FinFET device. Understand the benefits and IC implementation challenges with FinFET technology by going through lecture and lab exercise.
Target Audiences
One who are expected to have basic understanding of IC design flow and EDA tool exposure. Who are looking for learning FinFET technology and its physical design requirements and challenges.